///////////////////////////////////////////////////////////////////////////////
//
// IAR C/C++ Compiler V2.10.4.157 for STM8                13/Jul/2020  10:55:04
// Copyright 2010-2015 IAR Systems AB.
//
//    Source file  =  
//        F:\2-Lora\Code\stm8l151K6T6-WLAN\FWLIB\src\stm8l15x_usart.c
//    Command line =  
//        F:\2-Lora\Code\stm8l151K6T6-WLAN\FWLIB\src\stm8l15x_usart.c -e -Ol
//        --no_cse --no_unroll --no_inline --no_code_motion --no_tbaa
//        --no_cross_call --debug --code_model small --data_model medium -o
//        F:\2-Lora\Code\stm8l151K6T6-WLAN\Debug\Obj\ --dlib_config
//        E:\IAR\stm8\LIB\dlstm8smf.h -lB
//        F:\2-Lora\Code\stm8l151K6T6-WLAN\Debug\List\ -I
//        F:\2-Lora\Code\stm8l151K6T6-WLAN\FWLIB\inc\ -I
//        F:\2-Lora\Code\stm8l151K6T6-WLAN\FWLIB\src\ -I
//        F:\2-Lora\Code\stm8l151K6T6-WLAN\USER\ -I
//        F:\2-Lora\Code\stm8l151K6T6-WLAN\BSP\ -I
//        F:\2-Lora\Code\stm8l151K6T6-WLAN\radio\ -I
//        F:\2-Lora\Code\stm8l151K6T6-WLAN\SX1278\ --vregs 16
//    List file    =  
//        F:\2-Lora\Code\stm8l151K6T6-WLAN\Debug\List\stm8l15x_usart.s
//
///////////////////////////////////////////////////////////////////////////////

        EXTERN ?b0
        EXTERN ?b1
        EXTERN ?b10
        EXTERN ?b11
        EXTERN ?b2
        EXTERN ?b3
        EXTERN ?b4
        EXTERN ?b5
        EXTERN ?b6
        EXTERN ?b7
        EXTERN ?epilogue_l2_l3
        EXTERN ?load32_dbsp_l0
        EXTERN ?mov_l1_l3
        EXTERN ?mov_l3_l0
        EXTERN ?push_l2
        EXTERN ?push_l3
        EXTERN ?sll16_x_x_a
        EXTERN ?srl16_x_x_4
        EXTERN ?udiv32_l0_l0_l1
        EXTERN ?w0
        EXTERN ?w1
        EXTERN ?w4
        EXTERN CLK_GetClockFreq

        PUBLIC USART_ClearFlag
        PUBLIC USART_ClearITPendingBit
        PUBLIC USART_ClockInit
        PUBLIC USART_Cmd
        PUBLIC USART_DMACmd
        PUBLIC USART_DeInit
        PUBLIC USART_GetFlagStatus
        PUBLIC USART_GetITStatus
        PUBLIC USART_HalfDuplexCmd
        PUBLIC USART_ITConfig
        PUBLIC USART_Init
        PUBLIC USART_IrDACmd
        PUBLIC USART_IrDAConfig
        PUBLIC USART_ReceiveData8
        PUBLIC USART_ReceiveData9
        PUBLIC USART_ReceiverWakeUpCmd
        PUBLIC USART_SendBreak
        PUBLIC USART_SendData8
        PUBLIC USART_SendData9
        PUBLIC USART_SetAddress
        PUBLIC USART_SetGuardTime
        PUBLIC USART_SetPrescaler
        PUBLIC USART_SmartCardCmd
        PUBLIC USART_SmartCardNACKCmd
        PUBLIC USART_WakeUpConfig

// F:\2-Lora\Code\stm8l151K6T6-WLAN\FWLIB\src\stm8l15x_usart.c
//    1 /**
//    2   ******************************************************************************
//    3   * @file    stm8l15x_usart.c
//    4   * @author  MCD Application Team
//    5   * @version V1.6.0
//    6   * @date    28-June-2013
//    7   * @brief   This file provides firmware functions to manage the following 
//    8   *          functionalities of the Universal synchronous asynchronous receiver
//    9   *          transmitter (USART):           
//   10   *           - Initialization and Configuration
//   11   *           - Data transfers
//   12   *           - Multi-Processor Communication
//   13   *           - Half-duplex mode
//   14   *           - Smartcard mode
//   15   *           - IrDA mode
//   16   *           - DMA transfers management
//   17   *           - Interrupts and flags management 
//   18   *           
//   19   *  @verbatim
//   20   *      
//   21   *          ===================================================================
//   22   *                                 How to use this driver
//   23   *          ===================================================================
//   24   *          1. Enable peripheral clock using CLK_PeripheralClockConfig(CLK_Peripheral_USARTx,
//   25   *             ENABLE) function (Refer to the product datasheet for the available USART
//   26   *           	peripherals)
//   27   *
//   28   *          2.  Enable the external Pull-up on the used USART Pins using the
//   29   *              GPIO_ExternalPullUpConfig() function or an external pull-up equivalent resistor
//   30 	*              (RPU = 45 KOhm typical value). 
//   31 	*
//   32   *          3. Program the Baud Rate, Word Length , Stop Bit, Parity and Mode (Receiver/Transmitter)
//   33   *           	using the USART_Init() function.
//   34   *
//   35   *          4. For synchronous mode, enable the clock and program the polarity,
//   36   *             phase and last bit using the USART_ClockInit() function.
//   37   *
//   38   *          5. Enable the corresponding interrupt using the function USART_ITConfig() if you need 
//   39 	*             to use interrupt mode. 
//   40   *
//   41   *          6. When using the DMA mode 
//   42   *                   - Configure the DMA using DMA_Init() function
//   43   *                   - Activate the needed channel Request using USART_DMACmd() function
//   44   * 
//   45   *          7. Enable the USART using the USART_Cmd() function.
//   46   * 
//   47   *          8. Enable the DMA using the DMA_Cmd() function, when using DMA mode. 
//   48   *
//   49   *          Refer to Multi-Processor, half-duplex, Smartcard, IrDA sub-sections for more details.
//   50   *          
//   51   *  @endverbatim
//   52   *        
//   53   ******************************************************************************
//   54   *
//   55   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
//   56   * You may not use this file except in compliance with the License.
//   57   * You may obtain a copy of the License at:
//   58   *
//   59   *        http://www.st.com/software_license_agreement_liberty_v2
//   60   *
//   61   * Unless required by applicable law or agreed to in writing, software 
//   62   * distributed under the License is distributed on an "AS IS" BASIS, 
//   63   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
//   64   * See the License for the specific language governing permissions and
//   65   * limitations under the License.
//   66   *
//   67   ****************************************************************************** 
//   68   */ 
//   69 
//   70 /* Includes ------------------------------------------------------------------*/
//   71 #include "stm8l15x_usart.h"
//   72 
//   73 /** @addtogroup STM8L15x_StdPeriph_Driver
//   74   * @{
//   75   */
//   76 
//   77 /** @defgroup USART 
//   78   * @brief USART driver modules
//   79   * @{
//   80   */
//   81 	
//   82 /* Private typedef -----------------------------------------------------------*/
//   83 /* Private define ------------------------------------------------------------*/
//   84 /* Private macro -------------------------------------------------------------*/
//   85 /* Private variables ---------------------------------------------------------*/
//   86 /* Private function prototypes -----------------------------------------------*/
//   87 /* Private functions ---------------------------------------------------------*/
//   88 
//   89 /** @defgroup USART_Private_Functions
//   90   * @{
//   91   */
//   92 
//   93 /** @defgroup USART_Group1 Initialization and Configuration functions
//   94  *  @brief   Initialization and Configuration functions 
//   95  *
//   96 @verbatim   
//   97  ===============================================================================
//   98                   Initialization and Configuration functions
//   99  ===============================================================================  
//  100 
//  101   This subsection provides a set of functions allowing to initialize the USART 
//  102   in asynchronous and in synchronous modes.
//  103    - For the asynchronous mode only these parameters can be configured: 
//  104         - Baud Rate
//  105         - Word Length 
//  106         - Stop Bit
//  107         - Parity: If the parity is enabled, then the MSB bit of the data written
//  108           in the data register is transmitted but is changed by the parity bit.
//  109           Depending on the frame length defined by the M bit (8-bits or 9-bits),
//  110           the possible USART frame formats are as listed in the following table:
//  111    +-------------------------------------------------------------+     
//  112    |   M bit |  PCE bit  |            USART frame                |
//  113    |---------------------|---------------------------------------|             
//  114    |    0    |    0      |    | SB | 8 bit data | STB |          |
//  115    |---------|-----------|---------------------------------------|  
//  116    |    0    |    1      |    | SB | 7 bit data | PB | STB |     |
//  117    |---------|-----------|---------------------------------------|  
//  118    |    1    |    0      |    | SB | 9 bit data | STB |          |
//  119    |---------|-----------|---------------------------------------|  
//  120    |    1    |    1      |    | SB | 8 bit data | PB | STB |     |
//  121    +-------------------------------------------------------------+            
//  122         - Receiver/transmitter modes
//  123 
//  124   The USART_Init() function follows the USART  asynchronous configuration procedure
//  125   (details for the procedure are available in reference manual (RM0031)).
//  126 
//  127   - For the synchronous mode in addition to the asynchronous mode parameters these 
//  128     parameters should be also configured:
//  129         - USART Clock Enabled
//  130         - USART polarity
//  131         - USART phase
//  132         - USART LastBit
//  133   
//  134   These parameters can be configured using the USART_ClockInit() function.
//  135 
//  136 @endverbatim
//  137   * @{
//  138   */
//  139 
//  140 /**
//  141   * @brief   Deinitializes the USART peripheral.
//  142   * @param  USARTx: where x can be 1, 2 or 3 to select the specified USART peripheral.
//  143   * @retval None
//  144   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  145 void USART_DeInit(USART_TypeDef* USARTx)
//  146 {
//  147 
//  148   /* Clear the Idle Line Detected bit in the status register by a read
//  149       to the USART_SR register followed by a Read to the USART_DR register */
//  150   (void) USARTx->SR;
USART_DeInit:
        LD        A, (X)
        LD        S:?b1, A
//  151   (void) USARTx->DR;
        LDW       Y, X
        INCW      Y
        LD        A, (Y)
        LD        S:?b0, A
//  152 
//  153   USARTx->BRR2 = USART_BRR2_RESET_VALUE;  /* Set USART_BRR2 to reset value 0x00 */
        LDW       Y, X
        ADDW      Y, #0x3
        CLR       A
        LD        (Y), A
//  154   USARTx->BRR1 = USART_BRR1_RESET_VALUE;  /* Set USART_BRR1 to reset value 0x00 */
        LDW       Y, X
        ADDW      Y, #0x2
        CLR       A
        LD        (Y), A
//  155 
//  156   USARTx->CR1 = USART_CR1_RESET_VALUE;  /* Set USART_CR1 to reset value 0x00 */
        LDW       Y, X
        ADDW      Y, #0x4
        CLR       A
        LD        (Y), A
//  157   USARTx->CR2 = USART_CR2_RESET_VALUE;  /* Set USART_CR2 to reset value 0x00 */
        LDW       Y, X
        ADDW      Y, #0x5
        CLR       A
        LD        (Y), A
//  158   USARTx->CR3 = USART_CR3_RESET_VALUE;  /* Set USART_CR3 to reset value 0x00 */
        LDW       Y, X
        ADDW      Y, #0x6
        CLR       A
        LD        (Y), A
//  159   USARTx->CR4 = USART_CR4_RESET_VALUE;  /* Set USART_CR4 to reset value 0x00 */
        ADDW      X, #0x7
        CLR       A
        LD        (X), A
//  160 }
        RET
//  161 
//  162 /**
//  163   * @brief  Initializes the USART according to the specified parameters.
//  164   * @note   Configure in Push Pull or Open Drain mode the Tx pin by setting the
//  165   *         correct I/O Port register according the product package and line
//  166   *         configuration
//  167   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  168   * @param  BaudRate: The baudrate.
//  169   * @param  USART_WordLength: the word length
//  170   *           This parameter can be one of the following values:
//  171   *            @arg USART_WordLength_8b: 8 bits Data
//  172   *            @arg USART_WordLength_9b: 9 bits Data  
//  173   * @param  USART_StopBits: Stop Bit
//  174   *           This parameter can be one of the following values:
//  175   *            @arg USART_StopBits_1: One stop bit is transmitted at the end of frame
//  176   *            @arg USART_StopBits_2: Two stop bits are transmitted at the end of frame
//  177   *            @arg USART_StopBits_1_5: One and half stop bits
//  178   * @param  USART_Parity: Parity
//  179   *           This parameter can be one of the following values:
//  180   *            @arg USART_Parity_No: No Parity
//  181   *            @arg USART_Parity_Even: Even Parity
//  182   *            @arg USART_Parity_Odd: Odd Parity    
//  183   * @param  USART_Mode: Mode
//  184   *           This parameter can be one of the following values:
//  185   *            @arg USART_Mode_Rx: Receive Enable
//  186   *            @arg USART_Mode_Tx: Transmit Enable  
//  187   * @retval None
//  188   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  189 void USART_Init(USART_TypeDef* USARTx, uint32_t BaudRate, USART_WordLength_TypeDef
//  190                 USART_WordLength, USART_StopBits_TypeDef USART_StopBits,
//  191                 USART_Parity_TypeDef USART_Parity,  USART_Mode_TypeDef USART_Mode)
//  192 {
USART_Init:
        CALL      L:?push_l2
        CALL      L:?push_l3
        SUB       SP, #0x4
        LDW       S:?w4, X
        CALL      L:?mov_l3_l0
        LD        S:?b0, A
        MOV       S:?b10, S:?b6
//  193   uint32_t BaudRate_Mantissa = 0;
        LDW       X, #0x0
        LDW       (0x1,SP), X
        LDW       X, #0x0
        LDW       (0x3,SP), X
//  194 
//  195   /* Check the parameters */
//  196   assert_param(IS_USART_BAUDRATE(BaudRate));
//  197 
//  198   assert_param(IS_USART_WORDLENGTH(USART_WordLength));
//  199 
//  200   assert_param(IS_USART_STOPBITS(USART_StopBits));
//  201 
//  202   assert_param(IS_USART_PARITY(USART_Parity));
//  203 
//  204   assert_param(IS_USART_MODE(USART_Mode));
//  205 
//  206   /* Clear the word length and Parity Control bits */
//  207   USARTx->CR1 &= (uint8_t)(~(USART_CR1_PCEN | USART_CR1_PS | USART_CR1_M));
        LDW       X, S:?w4
        ADDW      X, #0x4
        LD        A, (X)
        AND       A, #0xe9
        LDW       X, S:?w4
        ADDW      X, #0x4
        LD        (X), A
//  208   /* Set the word length bit according to USART_WordLength value */
//  209   /* Set the Parity Control bit to USART_Parity value */
//  210   USARTx->CR1 |= (uint8_t)((uint8_t)USART_WordLength | (uint8_t)USART_Parity);
        LD        A, S:?b5
        OR        A, S:?b0
        LDW       X, S:?w4
        ADDW      X, #0x4
        OR        A, (X)
        LDW       X, S:?w4
        ADDW      X, #0x4
        LD        (X), A
//  211 
//  212   /* Clear the STOP bits */
//  213   USARTx->CR3 &= (uint8_t)(~USART_CR3_STOP);
        LDW       X, S:?w4
        ADDW      X, #0x6
        LD        A, (X)
        AND       A, #0xcf
        LDW       X, S:?w4
        ADDW      X, #0x6
        LD        (X), A
//  214   /* Set the STOP bits number according to USART_StopBits value */
//  215   USARTx->CR3 |= (uint8_t)USART_StopBits;
        LDW       X, S:?w4
        ADDW      X, #0x6
        LD        A, S:?b4
        OR        A, (X)
        LDW       X, S:?w4
        ADDW      X, #0x6
        LD        (X), A
//  216 
//  217   /* Clear the LSB mantissa of USARTDIV */
//  218   USARTx->BRR1 &= (uint8_t)(~USART_BRR1_DIVM);
        LDW       X, S:?w4
        ADDW      X, #0x2
        LD        A, (X)
        LD        S:?b11, A
        LDW       X, S:?w4
        ADDW      X, #0x2
        CLR       A
        LD        (X), A
//  219   /* Clear the MSB mantissa of USARTDIV */
//  220   USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVM);
        LDW       X, S:?w4
        ADDW      X, #0x3
        LD        A, (X)
        AND       A, #0xf
        LDW       X, S:?w4
        ADDW      X, #0x3
        LD        (X), A
//  221   /* Clear the Fraction bits of USARTDIV */
//  222   USARTx->BRR2 &= (uint8_t)(~USART_BRR2_DIVF);
        LDW       X, S:?w4
        ADDW      X, #0x3
        LD        A, (X)
        AND       A, #0xf0
        LDW       X, S:?w4
        ADDW      X, #0x3
        LD        (X), A
//  223 
//  224   BaudRate_Mantissa  = (uint32_t)(CLK_GetClockFreq() / BaudRate );
        CALL      L:CLK_GetClockFreq
        CALL      L:?mov_l1_l3
        CALL      L:?udiv32_l0_l0_l1
        CALL      L:?load32_dbsp_l0
        DATA
        DC8       0x1
        CODE
//  225   /* Set the fraction of USARTDIV */
//  226   USARTx->BRR2 = (uint8_t)((BaudRate_Mantissa >> (uint8_t)8) & (uint8_t)0xF0);
        LDW       X, (0x3,SP)
        CLR       A
        RRWA      X, A
        LD        A, XL
        AND       A, #0xf0
        LDW       X, S:?w4
        ADDW      X, #0x3
        LD        (X), A
//  227   /* Set the MSB mantissa of USARTDIV */
//  228   USARTx->BRR2 |= (uint8_t)(BaudRate_Mantissa & (uint8_t)0x0F);
        LDW       X, (0x3,SP)
        LD        A, XL
        AND       A, #0xf
        LDW       X, S:?w4
        ADDW      X, #0x3
        OR        A, (X)
        LDW       X, S:?w4
        ADDW      X, #0x3
        LD        (X), A
//  229   /* Set the LSB mantissa of USARTDIV */
//  230   USARTx->BRR1 = (uint8_t)(BaudRate_Mantissa >> (uint8_t)4);
        LDW       X, (0x3,SP)
        CALL      L:?srl16_x_x_4
        LD        A, XL
        LDW       X, S:?w4
        ADDW      X, #0x2
        LD        (X), A
//  231 
//  232   /* Disable the Transmitter and Receiver */
//  233   USARTx->CR2 &= (uint8_t)~(USART_CR2_TEN | USART_CR2_REN);
        LDW       X, S:?w4
        ADDW      X, #0x5
        LD        A, (X)
        AND       A, #0xf3
        LDW       X, S:?w4
        ADDW      X, #0x5
        LD        (X), A
//  234   /* Set TEN and REN bits according to USART_Mode value */
//  235   USARTx->CR2 |= (uint8_t)USART_Mode;
        LDW       X, S:?w4
        ADDW      X, #0x5
        LD        A, S:?b10
        OR        A, (X)
        LDW       X, S:?w4
        ADDW      X, #0x5
        LD        (X), A
//  236 }
        ADD       SP, #0x4
        JP        L:?epilogue_l2_l3
//  237 
//  238 /**
//  239   * @brief  Initializes the USART Clock according to the specified parameters.
//  240   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  241   * @param  USART_Clock: Clock
//  242   *           This parameter can be one of the following values:
//  243   *            @arg USART_Clock_Disable: CK pin disabled
//  244   *            @arg USART_Clock_Enable: CK pin enabled  
//  245   * @param  USART_CPOL: Clock Polarity
//  246   *           This parameter can be one of the following values:
//  247   *            @arg USART_CPOL_Low: CK to 0 when idle
//  248   *            @arg USART_CPOL_High: CK to 1 when idle
//  249   * @param  USART_CPHA: Clock Phase
//  250   *           This parameter can be one of the following values:
//  251   *            @arg USART_CPHA_1Edge: The first clock transition is the first data capture edge
//  252   *            @arg USART_CPHA_2Edge: The second clock transition is the first data capture edge
//  253   * @param  USART_LastBit: Last Bit
//  254   *           This parameter can be one of the following values:
//  255   *            @arg USART_LastBit_Disable: The clock pulse of the last data bit is 
//  256   *               not output to the SCLK pin
//  257   *            @arg USART_LastBit_Enable: The clock pulse of the last data bit is 
//  258   *               output to the SCLK pin
//  259   * @retval None
//  260   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  261 void USART_ClockInit(USART_TypeDef* USARTx, USART_Clock_TypeDef USART_Clock,
//  262                      USART_CPOL_TypeDef USART_CPOL, USART_CPHA_TypeDef USART_CPHA,
//  263                      USART_LastBit_TypeDef USART_LastBit)
//  264 {
USART_ClockInit:
        LD        S:?b3, A
//  265   /* Check the parameters */
//  266   assert_param(IS_USART_CLOCK(USART_Clock));
//  267   assert_param(IS_USART_CPOL(USART_CPOL));
//  268   assert_param(IS_USART_CPHA(USART_CPHA));
//  269   assert_param(IS_USART_LASTBIT(USART_LastBit));
//  270 
//  271   /* Clear the Clock Polarity, lock Phase, Last Bit Clock pulse */
//  272   USARTx->CR3 &= (uint8_t)~(USART_CR3_CPOL | USART_CR3_CPHA | USART_CR3_LBCL);
        LDW       Y, X
        ADDW      Y, #0x6
        LD        A, (Y)
        AND       A, #0xf8
        LDW       Y, X
        ADDW      Y, #0x6
        LD        (Y), A
//  273   /* Set the Clock Polarity, lock Phase, Last Bit Clock pulse */
//  274   USARTx->CR3 |= (uint8_t)((uint8_t)((uint8_t)(USART_CPOL | (uint8_t)USART_CPHA ) | USART_LastBit));
        LD        A, S:?b1
        OR        A, S:?b0
        OR        A, S:?b2
        LDW       Y, X
        ADDW      Y, #0x6
        OR        A, (Y)
        LDW       Y, X
        ADDW      Y, #0x6
        LD        (Y), A
//  275 
//  276   if (USART_Clock != USART_Clock_Disable)
        TNZ       S:?b3
        JREQ      L:??USART_ClockInit_0
//  277   {
//  278     USARTx->CR3 |= (uint8_t)(USART_CR3_CLKEN); /* Set the Clock Enable bit */
        LDW       Y, X
        ADDW      Y, #0x6
        LD        A, (Y)
        OR        A, #0x8
        ADDW      X, #0x6
        LD        (X), A
        RET
//  279   }
//  280   else
//  281   {
//  282     USARTx->CR3 &= (uint8_t)(~USART_CR3_CLKEN); /* Clear the Clock Enable bit */
??USART_ClockInit_0:
        LDW       Y, X
        ADDW      Y, #0x6
        LD        A, (Y)
        AND       A, #0xf7
        ADDW      X, #0x6
        LD        (X), A
//  283   }
//  284 }
        RET
//  285 
//  286 /**
//  287   * @brief  Enable the USART peripheral.
//  288   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  289   * @param  NewState: The new state of the USART Communication.
//  290     *         This parameter can be: ENABLE or DISABLE.
//  291   * @retval None
//  292   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  293 void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
//  294 {
//  295   if (NewState != DISABLE)
USART_Cmd:
        TNZ       A
        JREQ      L:??USART_Cmd_0
//  296   {
//  297     USARTx->CR1 &= (uint8_t)(~USART_CR1_USARTD); /**< USART Enable */
        LDW       Y, X
        ADDW      Y, #0x4
        LD        A, (Y)
        AND       A, #0xdf
        ADDW      X, #0x4
        LD        (X), A
        RET
//  298   }
//  299   else
//  300   {
//  301     USARTx->CR1 |= USART_CR1_USARTD;  /**< USART Disable (for low power consumption) */
??USART_Cmd_0:
        LDW       Y, X
        ADDW      Y, #0x4
        LD        A, (Y)
        OR        A, #0x20
        ADDW      X, #0x4
        LD        (X), A
//  302   }
//  303 }
        RET
//  304 
//  305 /**
//  306   * @brief  Sets the system clock prescaler.
//  307   * @note   IrDA Low Power mode or smartcard mode should be enabled
//  308   * @note   This function is related to SmartCard and IrDa mode.
//  309   * @param  USARTx: Select the USARTx peripheral.
//  310   * @param  USART_Prescaler: specifies the prescaler clock.
//  311   * @note   In IrDA Low Power Mode the clock source is divided by the value given 
//  312   *         in the register (8 bits)
//  313   *         - 0000 0000 Reserved
//  314   *         - 0000 0001 divides the clock source by 1
//  315   *         - 0000 0010 divides the clock source by 2
//  316   *         - ...
//  317   * @note   In Smart Card Mode the clock source is divided by the value given in the register
//  318   *         (5 significant bits) multiplied by 2
//  319   *         - 0 0000 Reserved
//  320   *         - 0 0001 divides the clock source by 2
//  321   *         - 0 0010 divides the clock source by 4
//  322   *         - 0 0011 divides the clock source by 6
//  323   *         - ...
//  324   * @retval None
//  325   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  326 void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
//  327 {
//  328   /* Load the USART prescaler value*/
//  329   USARTx->PSCR = USART_Prescaler;
USART_SetPrescaler:
        ADDW      X, #0xa
        LD        (X), A
//  330 }
        RET
//  331 
//  332 /**
//  333   * @brief  Transmits break characters.
//  334   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  335   * @retval None
//  336   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  337 void USART_SendBreak(USART_TypeDef* USARTx)
//  338 {
//  339   USARTx->CR2 |= USART_CR2_SBK;
USART_SendBreak:
        LDW       Y, X
        ADDW      Y, #0x5
        LD        A, (Y)
        OR        A, #0x1
        ADDW      X, #0x5
        LD        (X), A
//  340 }
        RET
//  341 
//  342 /**
//  343   * @}
//  344   */
//  345 
//  346 /** @defgroup USART_Group2 Data transfers functions
//  347  *  @brief   Data transfers functions 
//  348  *
//  349 @verbatim   
//  350  ===============================================================================
//  351                             Data transfers functions
//  352  ===============================================================================  
//  353 
//  354   This subsection provides a set of functions allowing to manage the USART data 
//  355   transfers.
//  356   
//  357   During an USART reception, data shifts in least significant bit first through 
//  358   the RX pin. In this mode, the USART_DR register is similar to a buffer (RDR) 
//  359   between the internal bus and the received shift register.
//  360 
//  361   When a transmission is taking place, a write instruction to the USART_DR register 
//  362   stores the data in the TDR register which is copied in the shift register 
//  363   at the end of the current transmission.
//  364 
//  365   The read access of the USART_DR register can be done using the USART_ReceiveData8()
//  366   or USART_ReceiveData9() functions and returns the RDR buffered value. Whereas a write
//  367 	access to the USART_DR can be done using USART_SendData8() or USART_SendData9() 
//  368 	functions and stores the written data into TDR buffer.
//  369 
//  370 @endverbatim
//  371   * @{
//  372   */
//  373 
//  374 /**
//  375   * @brief  Returns the most recent received data by the USART peripheral.
//  376   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  377   * @retval The received data.
//  378   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  379 uint8_t USART_ReceiveData8(USART_TypeDef* USARTx)
//  380 {
//  381   return USARTx->DR;
USART_ReceiveData8:
        INCW      X
        LD        A, (X)
        RET
//  382 }
//  383 
//  384 /**
//  385   * @brief  Returns the most recent received data by the USART peripheral.
//  386   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  387   * @retval The received data.
//  388   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  389 uint16_t USART_ReceiveData9(USART_TypeDef* USARTx)
//  390 {
USART_ReceiveData9:
        LDW       Y, X
//  391   uint16_t temp = 0;
        CLR       S:?b1
        CLR       S:?b0
//  392 
//  393   temp = ((uint16_t)(((uint16_t)((uint16_t)USARTx->CR1 & (uint16_t)USART_CR1_R8)) << 1));
        LDW       X, Y
        ADDW      X, #0x4
        LD        A, (X)
        CLRW      X
        LD        XL, A
        RLWA      X, A
        AND       A, #0x0
        RLWA      X, A
        AND       A, #0x80
        RLWA      X, A
        SLLW      X
        LDW       S:?w0, X
//  394   return (uint16_t)( ((uint16_t)((uint16_t)USARTx->DR) | temp) & ((uint16_t)0x01FF));
        LDW       X, Y
        INCW      X
        LD        A, (X)
        CLRW      X
        LD        XL, A
        RRWA      X, A
        OR        A, S:?b1
        RRWA      X, A
        OR        A, S:?b0
        RRWA      X, A
        RLWA      X, A
        AND       A, #0x1
        RLWA      X, A
        AND       A, #0xff
        RLWA      X, A
        RET
//  395 }
//  396 
//  397 /**
//  398   * @brief  Transmits 8 bit data through the USART peripheral.
//  399   * @param  Data: The data to transmit.
//  400   * @retval None
//  401   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  402 void USART_SendData8(USART_TypeDef* USARTx, uint8_t Data)
//  403 {
//  404   /* Transmit Data */
//  405   USARTx->DR = Data;
USART_SendData8:
        INCW      X
        LD        (X), A
//  406 }
        RET
//  407 
//  408 /**
//  409   * @brief  Transmits 9 bit data through the USART peripheral.
//  410   * @param  USARTx: Select the USARTx peripheral.
//  411   * @param  Data: The data to transmit.
//  412   *         This parameter should be lower than 0x1FF.
//  413   * @retval None
//  414   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  415 void USART_SendData9(USART_TypeDef* USARTx, uint16_t Data)
//  416 {
USART_SendData9:
        LDW       S:?w0, X
//  417   assert_param(IS_USART_DATA_9BITS(Data));
//  418 
//  419   /* Clear the transmit data bit 8     */
//  420   USARTx->CR1 &= ((uint8_t)~USART_CR1_T8);
        LDW       X, S:?w0
        ADDW      X, #0x4
        LD        A, (X)
        AND       A, #0xbf
        LDW       X, S:?w0
        ADDW      X, #0x4
        LD        (X), A
//  421 
//  422   /* Write the transmit data bit [8]   */
//  423   USARTx->CR1 |= (uint8_t)(((uint8_t)(Data >> 2)) & USART_CR1_T8);
        LDW       X, Y
        SRLW      X
        SRLW      X
        LD        A, XL
        AND       A, #0x40
        LDW       X, S:?w0
        ADDW      X, #0x4
        OR        A, (X)
        LDW       X, S:?w0
        ADDW      X, #0x4
        LD        (X), A
//  424 
//  425   /* Write the transmit data bit [0:7] */
//  426   USARTx->DR   = (uint8_t)(Data);
        LDW       X, S:?w0
        INCW      X
        LD        A, YL
        LD        (X), A
//  427 }
        RET
//  428 /**
//  429   * @}
//  430   */
//  431 
//  432 /** @defgroup USART_Group3 MultiProcessor Communication functions
//  433  *  @brief   Multi-Processor Communication functions 
//  434  *
//  435 @verbatim   
//  436  ===============================================================================
//  437                     Multi-Processor Communication functions
//  438  ===============================================================================  
//  439 
//  440   This subsection provides a set of functions allowing to manage the USART 
//  441   multiprocessor communication.
//  442   
//  443   For instance one of the USARTs can be the master, its TX output is connected to 
//  444   the RX input of the other USART. The others are slaves, their respective TX outputs 
//  445   are logically ANDed together and connected to the RX input of the master.
//  446 
//  447   USART multiprocessor communication is possible through the following procedure:
//  448      1. Program the Baud rate, Word length = 9 bits, Stop bits, Parity, Mode transmitter 
//  449         or Mode receiver and hardware flow control values using the USART_Init()
//  450         function.
//  451      2. Configures the USART address using the USART_SetAddress() function.
//  452      3. Configures the wake up method (USART_WakeUp_IdleLine or USART_WakeUp_AddressMark)
//  453         using USART_WakeUpConfig() function only for the slaves.
//  454      4. Enable the USART using the USART_Cmd() function.
//  455      5. Enter the USART slaves in mute mode using USART_ReceiverWakeUpCmd() function.
//  456 
//  457   The USART Slave exit from mute mode when receiving the wake up condition.
//  458 
//  459 @endverbatim
//  460   * @{
//  461   */
//  462 	
//  463 /**
//  464   * @brief  Determines if the USART is in mute mode or not.
//  465   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  466   * @param  NewState: The new state of the USART mode.
//  467     *         This parameter can be: ENABLE or DISABLE.
//  468   * @retval None
//  469   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  470 void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState)
//  471 {
//  472   assert_param(IS_FUNCTIONAL_STATE(NewState));
//  473 
//  474   if (NewState != DISABLE)
USART_ReceiverWakeUpCmd:
        TNZ       A
        JREQ      L:??USART_ReceiverWakeUpCmd_0
//  475   {
//  476     /* Enable the mute mode USART by setting the RWU bit in the CR2 register */
//  477     USARTx->CR2 |= USART_CR2_RWU;
        LDW       Y, X
        ADDW      Y, #0x5
        LD        A, (Y)
        OR        A, #0x2
        ADDW      X, #0x5
        LD        (X), A
        RET
//  478   }
//  479   else
//  480   {
//  481     /* Disable the mute mode USART by clearing the RWU bit in the CR1 register */
//  482     USARTx->CR2 &= ((uint8_t)~USART_CR2_RWU);
??USART_ReceiverWakeUpCmd_0:
        LDW       Y, X
        ADDW      Y, #0x5
        LD        A, (Y)
        AND       A, #0xfd
        ADDW      X, #0x5
        LD        (X), A
//  483   }
//  484 }
        RET
//  485 
//  486 /**
//  487   * @brief  Sets the address of the USART node.
//  488   * @param  USARTx: Select the USARTx peripheral.
//  489   * @param  Address: Indicates the address of the USART node.
//  490   *         This parameter should be lower than 16
//  491   * @retval None
//  492   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  493 void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
//  494 {
USART_SetAddress:
        LD        S:?b0, A
//  495   /* assert_param for USART_Address */
//  496   assert_param(IS_USART_ADDRESS(USART_Address));
//  497 
//  498   /* Clear the USART address */
//  499   USARTx->CR4 &= ((uint8_t)~USART_CR4_ADD);
        LDW       Y, X
        ADDW      Y, #0x7
        LD        A, (Y)
        AND       A, #0xf0
        LDW       Y, X
        ADDW      Y, #0x7
        LD        (Y), A
//  500   /* Set the USART address node */
//  501   USARTx->CR4 |= USART_Address;
        LDW       Y, X
        ADDW      Y, #0x7
        LD        A, S:?b0
        OR        A, (Y)
        ADDW      X, #0x7
        LD        (X), A
//  502 }
        RET
//  503 
//  504 /**
//  505   * @brief  Selects the USART WakeUp method.
//  506   * @param  USART_WakeUp: Specifies the USART wakeup method.
//  507   *           This parameter can be one of the following values:
//  508   *            @arg USART_WakeUp_IdleLine: 0x01 Idle Line wake up
//  509   *            @arg USART_WakeUp_AddressMark: 0x02 Address Mark wake up    
//  510   * @retval None
//  511   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  512 void USART_WakeUpConfig(USART_TypeDef* USARTx, USART_WakeUp_TypeDef USART_WakeUp)
//  513 {
USART_WakeUpConfig:
        LD        S:?b0, A
//  514   assert_param(IS_USART_WAKEUP(USART_WakeUp));
//  515 
//  516   USARTx->CR1 &= ((uint8_t)~USART_CR1_WAKE);
        LDW       Y, X
        ADDW      Y, #0x4
        LD        A, (Y)
        AND       A, #0xf7
        LDW       Y, X
        ADDW      Y, #0x4
        LD        (Y), A
//  517   USARTx->CR1 |= (uint8_t)USART_WakeUp;
        LDW       Y, X
        ADDW      Y, #0x4
        LD        A, S:?b0
        OR        A, (Y)
        ADDW      X, #0x4
        LD        (X), A
//  518 }
        RET
//  519 /**
//  520   * @}
//  521   */
//  522 
//  523 /** @defgroup USART_Group4 Halfduplex mode function
//  524  *  @brief   Half-duplex mode function 
//  525  *
//  526 @verbatim   
//  527  ===============================================================================
//  528                          Half-duplex mode function
//  529  ===============================================================================  
//  530 
//  531   This subsection provides a function allowing to manage the USART 
//  532   Half-duplex communication.
//  533   
//  534   The USART can be configured to follow a single-wire half-duplex protocol where 
//  535   the TX and RX lines are internally connected.
//  536 
//  537   USART Half duplex communication is possible through the following procedure:
//  538      1. Program the Baud rate, Word length, Stop bits, Parity, Mode transmitter 
//  539         or Mode receiver and hardware flow control values using the USART_Init()
//  540         function.
//  541      2. Configures the USART address using the USART_SetAddress() function.
//  542      3. Enable the USART using the USART_Cmd() function.
//  543      4. Enable the half duplex mode using USART_HalfDuplexCmd() function.
//  544 
//  545 Note:
//  546 ----
//  547   1. The RX pin is no longer used
//  548   2. In Half-duplex mode the following bits must be kept cleared:
//  549        - CLKEN bits in the USART_CR3 register.
//  550        - SCEN and IREN bits in the USART_CR5 register.
//  551 
//  552 @endverbatim
//  553   * @{
//  554   */
//  555 
//  556 /**
//  557   * @brief  Enables or disables the USART’s Half Duplex communication.
//  558   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  559   * @param  NewState new state of the USART Communication.
//  560     *         This parameter can be: ENABLE or DISABLE.
//  561   * @retval None
//  562   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  563 void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
//  564 {
//  565   assert_param(IS_FUNCTIONAL_STATE(NewState));
//  566 
//  567   if (NewState != DISABLE)
USART_HalfDuplexCmd:
        TNZ       A
        JREQ      L:??USART_HalfDuplexCmd_0
//  568   {
//  569     USARTx->CR5 |= USART_CR5_HDSEL;  /**< USART Half Duplex Enable  */
        LDW       Y, X
        ADDW      Y, #0x8
        LD        A, (Y)
        OR        A, #0x8
        ADDW      X, #0x8
        LD        (X), A
        RET
//  570   }
//  571   else
//  572   {
//  573     USARTx->CR5 &= (uint8_t)~USART_CR5_HDSEL; /**< USART Half Duplex Disable */
??USART_HalfDuplexCmd_0:
        LDW       Y, X
        ADDW      Y, #0x8
        LD        A, (Y)
        AND       A, #0xf7
        ADDW      X, #0x8
        LD        (X), A
//  574   }
//  575 }
        RET
//  576 
//  577 /**
//  578   * @}
//  579   */
//  580 
//  581 /** @defgroup USART_Group5 Smartcard mode functions
//  582  *  @brief   Smartcard mode functions 
//  583  *
//  584 @verbatim   
//  585  ===============================================================================
//  586                                Smartcard mode functions
//  587  ===============================================================================  
//  588 
//  589   This subsection provides a set of functions allowing to manage the USART 
//  590   Smartcard communication.
//  591   
//  592   The Smartcard interface is designed to support asynchronous protocol Smartcards as
//  593   defined in the ISO 7816-3 standard.
//  594 
//  595   The USART can provide a clock to the smartcard through the SCLK output.
//  596   In smartcard mode, SCLK is not associated to the communication but is simply derived 
//  597   from the internal peripheral input clock through a 5-bit prescaler.
//  598 
//  599   Smartcard communication is possible through the following procedure:
//  600      1. Configures the Smartcard Prsecaler using the USART_SetPrescaler() function.
//  601      2. Configures the Smartcard Guard Time using the USART_SetGuardTime() function.
//  602      3. Program the USART clock using the USART_ClockInit() function as following:
//  603         - USART Clock enabled
//  604         - USART CPOL Low
//  605         - USART CPHA on first edge
//  606         - USART Last Bit Clock Enabled
//  607      4. Program the Smartcard interface using the USART_Init() function as following:
//  608         - Word Length = 9 Bits
//  609         - 1.5 Stop Bit
//  610         - Even parity
//  611         - BaudRate = 12096 baud
//  612         - Hardware flow control disabled (RTS and CTS signals)
//  613         - Tx and Rx enabled
//  614      5. Optionally you can enable the parity error interrupt using the USART_ITConfig()
//  615         function
//  616      6. Enable the USART using the USART_Cmd() function.
//  617      7. Enable the Smartcard NACK using the USART_SmartCardNACKCmd() function.
//  618      8. Enable the Smartcard interface using the USART_SmartCardCmd() function.
//  619 
//  620   Please refer to the ISO 7816-3 specification for more details.
//  621 
//  622 Note: 
//  623 -----
//  624   1.  It is also possible to choose 0.5 stop bit for receiving but it is recommended 
//  625       to use 1.5 stop bits for both transmitting and receiving to avoid switching 
//  626       between the two configurations.
//  627   2. In smartcard mode, the following bits must be kept cleared:
//  628      - HDSEL and IREN bits in the USART_CR5 register.
//  629 
//  630 @endverbatim
//  631   * @{
//  632   */
//  633 	
//  634 /**
//  635   * @brief  Enables or disables the USART Smart Card mode.
//  636   * @param  USARTx: Select the USARTx peripheral.
//  637   * @param  NewState: new state of the Smart Card mode.
//  638     *         This parameter can be: ENABLE or DISABLE.
//  639   * @retval None
//  640   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  641 void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
//  642 {
//  643   assert_param(IS_FUNCTIONAL_STATE(NewState));
//  644 
//  645   if (NewState != DISABLE)
USART_SmartCardCmd:
        TNZ       A
        JREQ      L:??USART_SmartCardCmd_0
//  646   {
//  647     /* Enable the SC mode by setting the SCEN bit in the CR5 register */
//  648     USARTx->CR5 |= USART_CR5_SCEN;
        LDW       Y, X
        ADDW      Y, #0x8
        LD        A, (Y)
        OR        A, #0x20
        ADDW      X, #0x8
        LD        (X), A
        RET
//  649   }
//  650   else
//  651   {
//  652     /* Disable the SC mode by clearing the SCEN bit in the CR5 register */
//  653     USARTx->CR5 &= ((uint8_t)(~USART_CR5_SCEN));
??USART_SmartCardCmd_0:
        LDW       Y, X
        ADDW      Y, #0x8
        LD        A, (Y)
        AND       A, #0xdf
        ADDW      X, #0x8
        LD        (X), A
//  654   }
//  655 }
        RET
//  656 
//  657 /**
//  658   * @brief  Enables or disables NACK transmission.
//  659   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  660   * @param  NewState: new state of the Smart Card mode.
//  661     *         This parameter can be: ENABLE or DISABLE.
//  662   * @retval None
//  663   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  664 void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState)
//  665 {
//  666   assert_param(IS_FUNCTIONAL_STATE(NewState));
//  667 
//  668   if (NewState != DISABLE)
USART_SmartCardNACKCmd:
        TNZ       A
        JREQ      L:??USART_SmartCardNACKCmd_0
//  669   {
//  670     /* Enable the NACK transmission by setting the NACK bit in the CR5 register */
//  671     USARTx->CR5 |= USART_CR5_NACK;
        LDW       Y, X
        ADDW      Y, #0x8
        LD        A, (Y)
        OR        A, #0x10
        ADDW      X, #0x8
        LD        (X), A
        RET
//  672   }
//  673   else
//  674   {
//  675     /* Disable the NACK transmission by clearing the NACK bit in the CR5 register */
//  676     USARTx->CR5 &= ((uint8_t)~(USART_CR5_NACK));
??USART_SmartCardNACKCmd_0:
        LDW       Y, X
        ADDW      Y, #0x8
        LD        A, (Y)
        AND       A, #0xef
        ADDW      X, #0x8
        LD        (X), A
//  677   }
//  678 }
        RET
//  679 
//  680 /**
//  681   * @brief  Sets the specified USART guard time.
//  682   * @note   SmartCard Mode should be Enabled
//  683   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  684   * @param  USART_GuardTime: specifies the guard time.
//  685   * @retval None
//  686   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  687 void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
//  688 {
//  689   /* Set the USART guard time */
//  690   USARTx->GTR = USART_GuardTime;
USART_SetGuardTime:
        ADDW      X, #0x9
        LD        (X), A
//  691 }
        RET
//  692 
//  693 /**
//  694   * @}
//  695   */
//  696 
//  697 /** @defgroup USART_Group6 IrDA mode functions
//  698  *  @brief   IrDA mode functions 
//  699  *
//  700 @verbatim   
//  701  ===============================================================================
//  702                                 IrDA mode functions
//  703  ===============================================================================  
//  704 
//  705   This subsection provides a set of functions allowing to manage the USART 
//  706   IrDA communication.
//  707   
//  708   IrDA is a half duplex communication protocol. If the Transmitter is busy, any data
//  709   on the IrDA receive line will be ignored by the IrDA decoder and if the Receiver 
//  710   is busy, data on the TX from the USART to IrDA will not be encoded by IrDA.
//  711   While receiving data, transmission should be avoided as the data to be transmitted
//  712   could be corrupted.
//  713 
//  714   IrDA communication is possible through the following procedure:
//  715      1. Program the Baud rate, Word length = 8 bits, Stop bits, Parity, Transmitter/Receiver 
//  716         modes and hardware flow control values using the USART_Init() function.
//  717      2. Enable the USART using the USART_Cmd() function.
//  718      3. Configures the IrDA pulse width by configuring the prescaler using  
//  719         the USART_SetPrescaler() function.
//  720      4. Configures the IrDA  USART_IrDAMode_LowPower or USART_IrDAMode_Normal mode
//  721         using the USART_IrDAConfig() function.
//  722      5. Enable the IrDA using the USART_IrDACmd() function.
//  723 
//  724 Note: 
//  725 -----
//  726   1. A pulse of width less than two and greater than one PSC period(s) may or may
//  727      not be rejected.
//  728   2. The receiver set up time should be managed by software. The IrDA physical layer
//  729      specification specifies a minimum of 10 ms delay between transmission and 
//  730      reception (IrDA is a half duplex protocol).
//  731   3. In IrDA mode, the following bits must be kept cleared:
//  732     - STOP and CLKEN bits in the USART_CR3 register.
//  733     - SCEN and HDSEL bits in the USART_CR5 register.
//  734 
//  735 @endverbatim
//  736   * @{
//  737   */
//  738 	
//  739 /**
//  740   * @brief  Configures the USART’s IrDA interface.
//  741   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  742   * @param  USART_IrDAMode specifies the IrDA mode.
//  743   *           This parameter can be one of the following values:
//  744   *            @arg USART_IrDAMode_Normal: IrDA Normal Mode
//  745   *            @arg USART_IrDAMode_LowPower: IrDA Low Power Mode 
//  746   * @retval None
//  747   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  748 void USART_IrDAConfig(USART_TypeDef* USARTx, USART_IrDAMode_TypeDef USART_IrDAMode)
//  749 {
//  750   assert_param(IS_USART_IRDAMODE(USART_IrDAMode));
//  751 
//  752   if (USART_IrDAMode != USART_IrDAMode_Normal)
USART_IrDAConfig:
        TNZ       A
        JREQ      L:??USART_IrDAConfig_0
//  753   {
//  754     USARTx->CR5 |= USART_CR5_IRLP;
        LDW       Y, X
        ADDW      Y, #0x8
        LD        A, (Y)
        OR        A, #0x4
        ADDW      X, #0x8
        LD        (X), A
        RET
//  755   }
//  756   else
//  757   {
//  758     USARTx->CR5 &= ((uint8_t)~USART_CR5_IRLP);
??USART_IrDAConfig_0:
        LDW       Y, X
        ADDW      Y, #0x8
        LD        A, (Y)
        AND       A, #0xfb
        ADDW      X, #0x8
        LD        (X), A
//  759   }
//  760 }
        RET
//  761 
//  762 /**
//  763   * @brief  Enables or disables the USART’s IrDA interface.
//  764   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  765   * @param  NewState new state of the IrDA mode.
//  766     *         This parameter can be: ENABLE or DISABLE.
//  767   * @retval None
//  768   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  769 void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
//  770 {
//  771 
//  772   /* Check parameters */
//  773   assert_param(IS_FUNCTIONAL_STATE(NewState));
//  774 
//  775   if (NewState != DISABLE)
USART_IrDACmd:
        TNZ       A
        JREQ      L:??USART_IrDACmd_0
//  776   {
//  777     /* Enable the IrDA mode by setting the IREN bit in the CR3 register */
//  778     USARTx->CR5 |= USART_CR5_IREN;
        LDW       Y, X
        ADDW      Y, #0x8
        LD        A, (Y)
        OR        A, #0x2
        ADDW      X, #0x8
        LD        (X), A
        RET
//  779   }
//  780   else
//  781   {
//  782     /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
//  783     USARTx->CR5 &= ((uint8_t)~USART_CR5_IREN);
??USART_IrDACmd_0:
        LDW       Y, X
        ADDW      Y, #0x8
        LD        A, (Y)
        AND       A, #0xfd
        ADDW      X, #0x8
        LD        (X), A
//  784   }
//  785 }
        RET
//  786 
//  787 /**
//  788   * @}
//  789   */
//  790 
//  791 /** @defgroup USART_Group7 DMA transfers management functions
//  792  *  @brief   DMA transfers management functions
//  793  *
//  794 @verbatim   
//  795  ===============================================================================
//  796                       DMA transfers management functions
//  797  ===============================================================================  
//  798 
//  799 @endverbatim
//  800   * @{
//  801   */
//  802 
//  803 
//  804 /**
//  805   * @brief  Enables or disables the USART DMA interface.
//  806   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  807   * @param  USART_DMAReq Specifies the USART DMA transfer request to be enabled or disabled.
//  808   *           This parameter can be one of the following values:
//  809   *            @arg USART_DMAReq_TX: Receive DMA request Enable
//  810   *            @arg USART_DMAReq_RX: Transmit DMA request Enable 
//  811   * @param  NewState Indicates the new state of the USART DMA request.
//  812     *         This parameter can be: ENABLE or DISABLE.
//  813   * @retval None
//  814   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  815 void USART_DMACmd(USART_TypeDef* USARTx, USART_DMAReq_TypeDef USART_DMAReq,
//  816                   FunctionalState NewState)
//  817 {
//  818   /* Check the parameters */
//  819   assert_param(IS_USART_DMAREQ(USART_DMAReq));
//  820   assert_param(IS_FUNCTIONAL_STATE(NewState));
//  821 
//  822   if (NewState != DISABLE)
USART_DMACmd:
        TNZ       S:?b0
        JREQ      L:??USART_DMACmd_0
//  823   {
//  824     /* Enable the DMA transfer for selected requests by setting the DMAT and/or
//  825        DMAR bits in the USART CR5 register */
//  826     USARTx->CR5 |= (uint8_t) USART_DMAReq;
        LDW       Y, X
        ADDW      Y, #0x8
        OR        A, (Y)
        ADDW      X, #0x8
        LD        (X), A
        RET
//  827   }
//  828   else
//  829   {
//  830     /* Disable the DMA transfer for selected requests by clearing the DMAT and/or
//  831        DMAR bits in the USART CR5 register */
//  832     USARTx->CR5 &= (uint8_t)~USART_DMAReq;
??USART_DMACmd_0:
        LDW       Y, X
        ADDW      Y, #0x8
        CPL       A
        AND       A, (Y)
        ADDW      X, #0x8
        LD        (X), A
//  833   }
//  834 }
        RET
//  835 
//  836 /**
//  837   * @}
//  838   */
//  839   
//  840 /** @defgroup USART_Group8 Interrupts and flags management functions
//  841  *  @brief   Interrupts and flags management functions 
//  842  *
//  843 @verbatim   
//  844  ===============================================================================
//  845                    Interrupts and flags management functions
//  846  ===============================================================================  
//  847 
//  848   This subsection provides a set of functions allowing to configure the USART 
//  849   Interrupts sources, DMA channels requests and check or clear the flags or 
//  850   pending bits status.
//  851   The user should identify which mode will be used in his application to manage 
//  852   the communication: Polling mode, Interrupt mode or DMA mode. 
//  853     
//  854   Polling Mode
//  855   =============
//  856   In Polling Mode, the USART communication can be managed by 9 flags:
//  857      1. USART_FLAG_TXE: to indicate the status of the transmit buffer register
//  858      2. USART_FLAG_RXNE: to indicate the status of the receive buffer register
//  859      3. USART_FLAG_TC: to indicate the status of the transmit operation
//  860      4. USART_FLAG_IDLE: to indicate the status of the Idle Line             
//  861      5. USART_FLAG_SBK: to indicate the status of the Send Break characters
//  862      6. USART_FLAG_NE: to indicate if a noise error occur
//  863      7. USART_FLAG_FE: to indicate if a frame error occur
//  864      8. USART_FLAG_PE: to indicate if a parity error occur
//  865      9. USART_FLAG_ORE: to indicate if an Overrun error occur
//  866 
//  867   In this Mode it is advised to use the following functions:
//  868       - FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG);
//  869       - void USART_ClearFlag(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG);
//  870 
//  871   Interrupt Mode
//  872   ===============
//  873   In Interrupt Mode, the USART communication can be managed by 7 interrupt sources
//  874   and 6 pending bits: 
//  875 
//  876   Pending Bits:
//  877   ------------- 
//  878      1. USART_IT_TXE: to indicate the status of the transmit buffer register
//  879      2. USART_IT_RXNE: to indicate the status of the receive buffer register
//  880      3. USART_IT_TC: to indicate the status of the transmit operation
//  881      4. USART_IT_IDLE: to indicate the status of the Idle Line             
//  882      5. USART_IT_PE: to indicate if a parity error occur
//  883      6. USART_IT_OR: to indicate if an Noise flag, overrun error and framing error in
//  884 											multibuffer communication error occur
//  885 
//  886   Interrupt Source:
//  887   -----------------
//  888      1. USART_IT_TXE: specifies the interrupt source for the Tx buffer empty 
//  889                        interrupt. 
//  890      2. USART_IT_RXNE: specifies the interrupt source for the Rx buffer not 
//  891                         empty interrupt.
//  892      3. USART_IT_TC: specifies the interrupt source for the Transmit complete 
//  893 											interrupt. 
//  894      4. USART_IT_IDLE: specifies the interrupt source for the Idle Line interrupt.
//  895      5. USART_IT_PE: specifies the interrupt source for the parity error interrupt. 
//  896      6. USART_IT_ERR:  specifies the interrupt source for the errors interrupt.
//  897 		 7. USART_IT_OR: specifies the interrupt source for the overrun error interrupt.
//  898 
//  899     Note: Some parameters are coded in order to use them as interrupt source or 
//  900     ----  as pending bits.
//  901 
//  902   In this Mode it is advised to use the following functions:
//  903      - void USART_ITConfig(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT, FunctionalState
//  904                       		 NewState);
//  905      - ITStatus USART_GetITStatus(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT);
//  906      - void USART_ClearITPendingBit(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT);
//  907 
//  908   DMA Mode
//  909   ========
//  910   In DMA Mode, the USART communication can be managed by 2 DMA Channel requests:
//  911      1. USART_DMAReq_Tx: specifies the Tx buffer DMA transfer request
//  912      2. USART_DMAReq_Rx: specifies the Rx buffer DMA transfer request
//  913 
//  914   In this Mode it is advised to use the following function:
//  915      - void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState);
//  916 
//  917 @endverbatim
//  918   * @{
//  919   */
//  920 
//  921 /**
//  922   * @brief  Enables or disables the specified USART interrupts.
//  923   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
//  924   * @param  USART_IT specifies the USART interrupt sources to be enabled or disabled.
//  925   *         This parameter can be one of the following values:
//  926   *            @arg USART_IT_TXE: Transmit Data Register empty interrupt
//  927   *            @arg USART_IT_TC: Transmission complete interrupt
//  928   *            @arg USART_IT_RXNE: Receive Data register not empty interrupt
//  929   *            @arg USART_IT_OR: Overrun error interrupt
//  930   *            @arg USART_IT_IDLE: Idle line detection interrupt
//  931   *            @arg USART_IT_ERR: Error interrupt
//  932   * @param  NewState new state of the specified USART interrupts.
//  933     *         This parameter can be: ENABLE or DISABLE.
//  934   * @retval None
//  935   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  936 void USART_ITConfig(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT, FunctionalState NewState)
//  937 {
USART_ITConfig:
        LDW       S:?w0, X
        LD        S:?b4, A
//  938   uint8_t usartreg, itpos = 0x00;
        CLR       S:?b3
//  939   assert_param(IS_USART_CONFIG_IT(USART_IT));
//  940   assert_param(IS_FUNCTIONAL_STATE(NewState));
//  941 
//  942   /* Get the USART register index */
//  943   usartreg = (uint8_t)((uint16_t)USART_IT >> 0x08);
        LDW       X, Y
        CLR       A
        RRWA      X, A
        EXG       A, XL
        LD        S:?b2, A
        EXG       A, XL
//  944   /* Get the USART IT index */
//  945   itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
        LD        A, YL
        AND       A, #0xf
        CLRW      X
        INCW      X
        CALL      L:?sll16_x_x_a
        LD        A, XL
        LD        S:?b3, A
//  946 
//  947   if (NewState != DISABLE)
        TNZ       S:?b4
        JREQ      L:??USART_ITConfig_0
//  948   {
//  949     /**< Enable the Interrupt bits according to USART_IT mask */
//  950     if (usartreg == 0x01)
        LD        A, S:?b2
        CP        A, #0x1
        JRNE      L:??USART_ITConfig_1
//  951     {
//  952       USARTx->CR1 |= itpos;
        LDW       X, S:?w0
        ADDW      X, #0x4
        LD        A, S:?b3
        OR        A, (X)
        LDW       X, S:?w0
        ADDW      X, #0x4
        LD        (X), A
        RET
//  953     }
//  954     else if (usartreg == 0x05)
??USART_ITConfig_1:
        LD        A, S:?b2
        CP        A, #0x5
        JRNE      L:??USART_ITConfig_2
//  955     {
//  956       USARTx->CR5 |= itpos;
        LDW       X, S:?w0
        ADDW      X, #0x8
        LD        A, S:?b3
        OR        A, (X)
        LDW       X, S:?w0
        ADDW      X, #0x8
        LD        (X), A
        RET
//  957     }
//  958     /*uartreg =0x02*/
//  959     else
//  960     {
//  961       USARTx->CR2 |= itpos;
??USART_ITConfig_2:
        LDW       X, S:?w0
        ADDW      X, #0x5
        LD        A, S:?b3
        OR        A, (X)
        LDW       X, S:?w0
        ADDW      X, #0x5
        LD        (X), A
        RET
//  962     }
//  963   }
//  964   else
//  965   {
//  966     /**< Disable the interrupt bits according to USART_IT mask */
//  967     if (usartreg == 0x01)
??USART_ITConfig_0:
        LD        A, S:?b2
        CP        A, #0x1
        JRNE      L:??USART_ITConfig_3
//  968     {
//  969       USARTx->CR1 &= (uint8_t)(~itpos);
        LDW       X, S:?w0
        ADDW      X, #0x4
        CPL       S:?b3
        LD        A, S:?b3
        AND       A, (X)
        LDW       X, S:?w0
        ADDW      X, #0x4
        LD        (X), A
        RET
//  970     }
//  971     else if (usartreg == 0x05)
??USART_ITConfig_3:
        LD        A, S:?b2
        CP        A, #0x5
        JRNE      L:??USART_ITConfig_4
//  972     {
//  973       USARTx->CR5 &= (uint8_t)(~itpos);
        LDW       X, S:?w0
        ADDW      X, #0x8
        CPL       S:?b3
        LD        A, S:?b3
        AND       A, (X)
        LDW       X, S:?w0
        ADDW      X, #0x8
        LD        (X), A
        RET
//  974     }
//  975     /*uartreg =0x02*/
//  976     else
//  977     {
//  978       USARTx->CR2 &= (uint8_t)(~itpos);
??USART_ITConfig_4:
        LDW       X, S:?w0
        ADDW      X, #0x5
        CPL       S:?b3
        LD        A, S:?b3
        AND       A, (X)
        LDW       X, S:?w0
        ADDW      X, #0x5
        LD        (X), A
//  979     }
//  980   }
//  981 }
        RET
//  982 
//  983 /**
//  984   * @brief  Checks whether the specified USART flag is set or not.
//  985   * @param  USARTx: Select the USARTx peripheral.
//  986   * @param  USART_FLAG specifies the flag to check.
//  987   *         This parameter can be one of the following values:
//  988   *            @arg USART_FLAG_TXE: Transmit Data Register empty
//  989   *            @arg USART_FLAG_TC: Transmission Complete 
//  990   *            @arg USART_FLAG_RXNE: Read Data Register Not Empty
//  991   *            @arg USART_FLAG_IDLE: Idle line detected
//  992   *            @arg USART_FLAG_OR: OverRun error
//  993   *            @arg USART_FLAG_NF: Noise error
//  994   *            @arg USART_FLAG_FE: Framing Error
//  995   *            @arg USART_FLAG_PE: Parity Error
//  996   *            @arg USART_FLAG_SBK: Send Break characters               
//  997   * @retval FlagStatus (SET or RESET)
//  998   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
//  999 FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
// 1000 {
// 1001   FlagStatus status = RESET;
USART_GetFlagStatus:
        CLR       A
// 1002 
// 1003   /* Check parameters */
// 1004   assert_param(IS_USART_FLAG(USART_FLAG));
// 1005 
// 1006   if (USART_FLAG == USART_FLAG_SBK)
        CPW       Y, #0x101
        JRNE      L:??USART_GetFlagStatus_0
// 1007   {
// 1008     if ((USARTx->CR2 & (uint8_t)USART_FLAG) != (uint8_t)0x00)
        ADDW      X, #0x5
        LD        A, YL
        AND       A, (X)
        CP        A, #0x0
        JREQ      L:??USART_GetFlagStatus_1
// 1009     {
// 1010       /* USART_FLAG is set*/
// 1011       status = SET;
        LD        A, #0x1
        RET
// 1012     }
// 1013     else
// 1014     {
// 1015       /* USART_FLAG is reset*/
// 1016       status = RESET;
??USART_GetFlagStatus_1:
        CLR       A
        RET
// 1017     }
// 1018   }
// 1019   else
// 1020   {
// 1021     if ((USARTx->SR & (uint8_t)USART_FLAG) != (uint8_t)0x00)
??USART_GetFlagStatus_0:
        LD        A, YL
        AND       A, (X)
        CP        A, #0x0
        JREQ      L:??USART_GetFlagStatus_2
// 1022     {
// 1023       /* USART_FLAG is set*/
// 1024       status = SET;
        LD        A, #0x1
        RET
// 1025     }
// 1026     else
// 1027     {
// 1028       /* USART_FLAG is reset*/
// 1029       status = RESET;
??USART_GetFlagStatus_2:
        CLR       A
// 1030     }
// 1031   }
// 1032   /* Return the USART_FLAG status*/
// 1033   return status;
        RET
// 1034 }
// 1035 
// 1036 /**
// 1037   * @brief  Clears the USARTx's pending flags.
// 1038   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
// 1039   * @param  USART_FLAG: specifies the flag to clear.
// 1040   *         This parameter can be any combination of the following values:
// 1041   *            @arg USART_FLAG_TC:   Transmission Complete flag.
// 1042   *            @arg USART_FLAG_RXNE: Receive data register not empty flag.
// 1043   * @note   PE (Parity error), FE (Framing error), NE (Noise error), OR (OverRun error)
// 1044   *         and IDLE (Idle line detected) flags are cleared by software sequence: a read
// 1045   *         operation to USART_SR register (USART_GetFlagStatus())followed by a read
// 1046   *         operation to USART_DR register(USART_ReceiveData8() or USART_ReceiveData9()).
// 1047   * @note   RXNE flag can be also cleared by a read to the USART_DR register
// 1048   *         (USART_ReceiveData8()or USART_ReceiveData9()).
// 1049   * @note   TC flag can be also cleared by software sequence: a read operation to USART_SR
// 1050   *         register (USART_GetFlagStatus()) followed by a write operation to USART_DR
// 1051   *         register (USART_SendData8() or USART_SendData9()).
// 1052   * @note    TXE flag is cleared only by a write to the USART_DR register
// 1053   *         (USART_SendData8() or USART_SendData9()).
// 1054   * @note   SBK flag is cleared during the stop bit of break.
// 1055   * @retval None
// 1056   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
// 1057 void USART_ClearFlag(USART_TypeDef* USARTx, USART_FLAG_TypeDef USART_FLAG)
// 1058 {
// 1059   /* Check the parameters */
// 1060   assert_param(IS_USART_CLEAR_FLAG(USART_FLAG));
// 1061   /*< Clear RXNE or TC flags */
// 1062   USARTx->SR = (uint8_t)((uint16_t)~((uint16_t)USART_FLAG));
USART_ClearFlag:
        LD        A, YL
        CPL       A
        LD        (X), A
// 1063 }
        RET
// 1064 
// 1065 /**
// 1066   * @brief  Checks whether the specified USART interrupt has occurred or not.
// 1067   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
// 1068   * @param  USART_IT: Specifies the USART interrupt pending bit to check.
// 1069   *         This parameter can be one of the following values:
// 1070   *            @arg USART_IT_TXE: Transmit Data Register empty interrupt
// 1071   *            @arg USART_IT_TC: Transmission complete interrupt
// 1072   *            @arg USART_IT_RXNE: Receive Data register not empty interrupt
// 1073   *            @arg USART_IT_IDLE: Idle line detection interrupt
// 1074   *            @arg USART_IT_OR: OverRun Error interrupt
// 1075   *            @arg USART_IT_PE: Parity Error interrupt
// 1076   *            @arg USART_IT_FE: Frame Error interrupt
// 1077   *            @arg USART_IT_NF: Noise Flag Error interrupt
// 1078   * @retval ITStatus The new state of USART_IT (SET or RESET).
// 1079   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
// 1080 ITStatus USART_GetITStatus(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
// 1081 {
USART_GetITStatus:
        LDW       S:?w1, X
// 1082   ITStatus pendingbitstatus = RESET;
        CLR       S:?b0
// 1083   uint8_t temp = 0;
        CLR       S:?b7
// 1084   uint8_t itpos = 0;
        CLR       S:?b6
// 1085   uint8_t itmask1 = 0;
        CLR       S:?b1
// 1086   uint8_t itmask2 = 0;
        CLR       S:?b5
// 1087   uint8_t enablestatus = 0;
        CLR       S:?b4
// 1088 
// 1089   /* Check parameters */
// 1090   assert_param(IS_USART_GET_IT(USART_IT));
// 1091 
// 1092   /* Get the USART IT index */
// 1093   itpos = (uint8_t)((uint8_t)1 << (uint8_t)((uint8_t)USART_IT & (uint8_t)0x0F));
        LD        A, YL
        AND       A, #0xf
        CLRW      X
        INCW      X
        CALL      L:?sll16_x_x_a
        LD        A, XL
        LD        S:?b6, A
// 1094   /* Get the USART IT index */
// 1095   itmask1 = (uint8_t)((uint8_t)USART_IT >> (uint8_t)4);
        LD        A, YL
        SWAP      A
        AND       A, #0xf
        LD        S:?b1, A
// 1096   /* Set the IT mask*/
// 1097   itmask2 = (uint8_t)((uint8_t)1 << itmask1);
        CLRW      X
        INCW      X
        LD        A, S:?b1
        CALL      L:?sll16_x_x_a
        LD        A, XL
        LD        S:?b5, A
// 1098 
// 1099   /* Check the status of the specified USART pending bit*/
// 1100   if (USART_IT == USART_IT_PE)
        CPW       Y, #0x100
        JRNE      L:??USART_GetITStatus_0
// 1101   {
// 1102     /* Get the USART_IT enable bit status*/
// 1103     enablestatus = (uint8_t)((uint8_t)USARTx->CR1 & itmask2);
        LDW       X, S:?w1
        ADDW      X, #0x4
        LD        A, S:?b5
        AND       A, (X)
        LD        S:?b4, A
// 1104     /* Check the status of the specified USART interrupt*/
// 1105 
// 1106     if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
        LD        A, S:?b6
        AND       A, [S:?w1.w]
        CP        A, #0x0
        JREQ      L:??USART_GetITStatus_1
        TNZ       S:?b4
        JREQ      L:??USART_GetITStatus_1
// 1107     {
// 1108       /* Interrupt occurred*/
// 1109       pendingbitstatus = SET;
        MOV       S:?b0, #0x1
        JRA       L:??USART_GetITStatus_2
// 1110     }
// 1111     else
// 1112     {
// 1113       /* Interrupt not occurred*/
// 1114       pendingbitstatus = RESET;
??USART_GetITStatus_1:
        CLR       S:?b0
        JRA       L:??USART_GetITStatus_2
// 1115     }
// 1116   }
// 1117 
// 1118   else if (USART_IT == USART_IT_OR)
??USART_GetITStatus_0:
        CPW       Y, #0x235
        JRNE      L:??USART_GetITStatus_3
// 1119   {
// 1120     /* Get the USART_IT enable bit status*/
// 1121     enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
        LDW       X, S:?w1
        ADDW      X, #0x5
        LD        A, S:?b5
        AND       A, (X)
        LD        S:?b4, A
// 1122     /* Check the status of the specified USART interrupt*/
// 1123 
// 1124     temp = (uint8_t)(USARTx->CR5 & USART_CR5_EIE);
        LDW       X, S:?w1
        ADDW      X, #0x8
        LD        A, (X)
        AND       A, #0x1
        LD        S:?b7, A
// 1125 
// 1126     if (( (USARTx->SR & itpos) != 0x00) && ((enablestatus || temp)))
        LD        A, S:?b6
        AND       A, [S:?w1.w]
        CP        A, #0x0
        JREQ      L:??USART_GetITStatus_4
        TNZ       S:?b4
        JRNE      L:??USART_GetITStatus_5
        TNZ       S:?b7
        JREQ      L:??USART_GetITStatus_4
// 1127     {
// 1128       /* Interrupt occurred*/
// 1129       pendingbitstatus = SET;
??USART_GetITStatus_5:
        MOV       S:?b0, #0x1
        JRA       L:??USART_GetITStatus_2
// 1130     }
// 1131     else
// 1132     {
// 1133       /* Interrupt not occurred*/
// 1134       pendingbitstatus = RESET;
??USART_GetITStatus_4:
        CLR       S:?b0
        JRA       L:??USART_GetITStatus_2
// 1135     }
// 1136   }
// 1137 
// 1138   else
// 1139   {
// 1140     /* Get the USART_IT enable bit status*/
// 1141     enablestatus = (uint8_t)((uint8_t)USARTx->CR2 & itmask2);
??USART_GetITStatus_3:
        LDW       X, S:?w1
        ADDW      X, #0x5
        LD        A, S:?b5
        AND       A, (X)
        LD        S:?b4, A
// 1142     /* Check the status of the specified USART interrupt*/
// 1143     if (((USARTx->SR & itpos) != (uint8_t)0x00) && enablestatus)
        LD        A, S:?b6
        AND       A, [S:?w1.w]
        CP        A, #0x0
        JREQ      L:??USART_GetITStatus_6
        TNZ       S:?b4
        JREQ      L:??USART_GetITStatus_6
// 1144     {
// 1145       /* Interrupt occurred*/
// 1146       pendingbitstatus = SET;
        MOV       S:?b0, #0x1
        JRA       L:??USART_GetITStatus_2
// 1147     }
// 1148     else
// 1149     {
// 1150       /* Interrupt not occurred*/
// 1151       pendingbitstatus = RESET;
??USART_GetITStatus_6:
        CLR       S:?b0
// 1152     }
// 1153   }
// 1154 
// 1155   /* Return the USART_IT status*/
// 1156   return  pendingbitstatus;
??USART_GetITStatus_2:
        LD        A, S:?b0
        RET
// 1157 }
// 1158 
// 1159 /**
// 1160   * @brief  Clears the USARTx’s interrupt pending bits.
// 1161   * @param  USARTx: where x can be 1 to select the specified USART peripheral.
// 1162   * @param  USART_IT: specifies the interrupt pending bit to clear.
// 1163   *         This parameter can be one of the following values:
// 1164   *            @arg USART_IT_TC: Transmission complete interrupt.
// 1165   * @note   PE (Parity error), FE (Framing error), NE (Noise error),
// 1166   *         OR (OverRun error) and IDLE (Idle line detected) pending bits are
// 1167   *         cleared by software sequence: a read operation to USART_SR register
// 1168   *         (USART_GetITStatus()) followed by a read operation to USART_DR
// 1169   *         register (USART_ReceiveData8() or USART_ReceiveData9()).
// 1170   * @note   RXNE pending bit can be also cleared by a read to the USART_DR register
// 1171   *         (USART_ReceiveData8() or USART_ReceiveData9()).
// 1172   * @note   TC (Transmit complete) pending bit can be also cleared by software
// 1173   *         sequence: a read operation to USART_SR register (USART_GetITStatus())
// 1174   *         followed by a write operation to USART_DR register (USART_SendData8()
// 1175   *         or USART_SendData9()).
// 1176   * @note   TXE pending bit is cleared only by a write to the USART_DR register
// 1177   *         (USART_SendData8() or USART_SendData9()).
// 1178   * @retval None
// 1179   */

        SECTION `.near_func.text`:CODE:REORDER:NOROOT(0)
        CODE
// 1180 void USART_ClearITPendingBit(USART_TypeDef* USARTx, USART_IT_TypeDef USART_IT)
// 1181 {
// 1182   assert_param(IS_USART_CLEAR_IT(USART_IT));
// 1183 
// 1184   /*< Clear RXNE or TC pending bit */
// 1185   USARTx->SR &= (uint8_t)(~USART_SR_TC);
USART_ClearITPendingBit:
        LD        A, (X)
        AND       A, #0xbf
        LD        (X), A
// 1186 }
        RET

        SECTION VREGS:DATA:REORDER:NOROOT(0)

        END
// 1187 
// 1188 
// 1189 /**
// 1190   * @}
// 1191   */
// 1192 
// 1193 /**
// 1194   * @}
// 1195   */
// 1196 
// 1197 /**
// 1198   * @}
// 1199   */
// 1200 
// 1201 /**
// 1202   * @}
// 1203   */
// 1204 
// 1205 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
// 
// 1 164 bytes in section .near_func.text
// 
// 1 164 bytes of CODE memory
//
//Errors: none
//Warnings: none
